Semiconductor manufacturing, such as the fabrication of integrated circuits, typically entails the use of photolithography. A semiconductor substrate on which circuits are being formed, usually a silicon wafer, is coated with a material, such as a photoresist, that changes solubility when exposed to radiation. A lithography tool, such as a mask or reticle, positioned between the radiation source and the semiconductor substrate casts a shadow to control which areas of the substrate are exposed to the radiation. After the exposure, the photoresist is removed from either the exposed or the unexposed areas, leaving a patterned layer of photoresist on the wafer that protects parts of the wafer during a subsequent etching or diffusion process.
The photolithography process allows multiple integrated circuit devices or electromechanical devices, often referred to as “chips,” to be formed on each wafer. The wafer is then cut up into individual dies, each including a single integrated circuit device or electromechanical device. Ultimately, these dies are subjected to additional operations and packaged into individual integrated circuit chips or electromechanical devices.
During the manufacturing process, variations in exposure and focus require that the patterns developed by lithographic processes be continually monitored or measured to determine if the dimensions of the patterns are within acceptable ranges. The importance of such monitoring, often referred to as process control, increases considerably as pattern sizes become smaller, especially as minimum feature sizes approach the limits of resolution available by the lithographic process. In order to achieve ever-higher device density, smaller and smaller feature sizes are required. This may include the width and spacing of interconnecting lines, spacing and diameter of contact holes, and the surface geometry such as corners and edges of various features. Features on the wafer are three-dimensional structures and a complete characterization must describe not just a surface dimension, such as the top width of a line or trench, but a complete three-dimensional profile of the feature. Process engineers must be able to accurately measure the critical dimensions (CD) of such surface features to fine tune the fabrication process and assure a desired device geometry is obtained.
Typically, CD measurements are made using instruments such as a scanning electron microscope (SEM). In a scanning electron microscope (SEM), a primary electron beam is focused to a fine spot that scans the surface to be observed. Secondary electrons are emitted from the surface as it is impacted by the primary beam. The secondary electrons are detected, and an image is formed, with the brightness at each point of the image being determined by the number of secondary electrons detected when the beam impacts a corresponding spot on the surface. As features continue to get smaller and smaller, however, there comes a point where the features to be measured are too small for the resolution provided by an ordinary SEM.
Transmission electron microscopes (TEMs) allow observers to see extremely small features, on the order of nanometers. In contrast SEMs, which only image the surface of a material, TEM also allows analysis of the internal structure of a sample. In a TEM, a broad beam impacts the sample and electrons that are transmitted through the sample are focused to form an image of the sample. The sample must be sufficiently thin to allow many of the electrons in the primary beam to travel though the sample and exit on the opposite site. Samples, also referred to as lamellae, are typically less than 100 nm thick.
In a scanning transmission electron microscope (STEM), a primary electron beam is focused to a fine spot, and the spot is scanned across the sample surface. Electrons that are transmitted through the work piece are collected by an electron detector on the far side of the sample, and the intensity of each point on the image corresponds to the number of electrons collected as the primary beam impacts a corresponding point on the surface.
Because a sample must be very thin for viewing with transmission electron microscopy (whether TEM or STEM), preparation of the sample can be delicate, time-consuming work. The term “TEM” as used herein refers to a TEM or an STEM and references to preparing a sample for a TEM are to be understood to also include preparing a sample for viewing on an STEM. The term “S/TEM” as used herein also refers to both TEM and STEM.
Several techniques are known for preparing TEM specimens. These techniques may involve cleaving, chemical polishing, mechanical polishing, or broad beam low energy ion milling, or combining one or more of the above. The disadvantage to these techniques is that they are not site-specific and often require that the starting material be sectioned into smaller and smaller pieces, thereby destroying much of the original sample.
In metrology, precise crystallographic alignment is often needed for proper STEM and TEM analysis. In the same token, material stack alignment is needed for non-crystallographic materials. Traditional routines for alignment of crystallographic structures or material stack alignment for non-crystallographic materials involve routines that can be extensively time consuming that requires multiple focusing routines when a sample is positioned or tilted.
What is needed is a repeatable method of TEM sample alignment to the incoming TEM or STEM beam, or charged particle beam. A routine that a robust and easy method of aligning the sample that is not dependent on crystalline orientation of the sample could enhance the throughput of the analysis process.